Browsing by Subject "Computer architecture"

Now showing items 1-9 of 9

    • Evaluation of Hardware-based Data Flow Integrity 
      Rachala, Abhijith Reddy (2019-07-11)
      Computer security is a very critical problem these days, as it has widespread consequences in case of a failure of computer systems security, like desktop machines, mobile phones, tablets and Internet of Things (IoT) ...
    • An experiment in the design of a microprocessor-based distributed discrete simulation language 
      Wyatt, Dana Lynn (Texas A&M University. Libraries, 1986)
      The research reported in this dissertation involved the design and development of a multitasked emulation of a microprocessor-based distributed discrete simulation system based upon the support function approach. A prototype ...
    • Internship experience at Texas Instruments: the internship report 
      Glover, Kerry Cloyce, 1954- (Texas A&M University, 2013-03-13)
      This report presents a survey of the author's internship experience with Texas Instruments from November 1980 to November 1981. The internship was spent in the Advanced Research and Development Division of the ...
    • Models and algorithms for task allocation in a parallel environment 
      Lopez, Dian Rae (Texas A&M University. Libraries, 1992)
      A task allocation algorithm in a parallel system assigns tasks to each processor with a goal of minimizing both execution and communication costs. Previous research shows the need for algorithms which can approximate this ...
    • Semantic gap reduction for microprocessor systems 
      Aletan, Samuel Olubode Olubusola (Texas A&M University. Libraries, 1986)
      The objective of this dissertation is to design an instruction set that will reduce the semantic gap (the difference between the concepts in HLPL's-- high level programming languages-- and the architecture of a computer ...
    • The systolic architecture for hierarchical clustering 
      Ku, Long-Chia (Texas A&M University. Libraries, 1984)
      Several hierarchical clustering methods (including single-linkage, complete-linkage, centroid, and absolute overlap methods) are reviewed. The absolute overlap clustering method is selected for the design of systolic ...
    • A VLSI Cache RISC for the C language 
      Chung, Chung-Ping (Texas A&M University. Libraries, 1986)
      The performance of computers has always been the major concern of computer architects and circuit designers. Besides their advantages of ease of design and reliability, the RISCs (Reduced Instruction Set Computers) have ...
    • A wafer scale cellular tree architecture 
      Harden, James Curry (Texas A&M University. Libraries, 1985)
      Binary tree architectures are a good candidate for WSI because of the regular use of cells and local communication requirements. Unfortunately, a single critical failure can render an entire structure useless unless suitable ...
    • A wafer-scale boundary value integrated circuit architecture 
      Delgado-Frias, Jose Guadalupe (Texas A&M University. Libraries, 1986)
      Wafer-Scale Integration (WSI) technology offers the potential for improving speed and reliability of a large integrated circuit system. An architecture is presented for a boundary value integrated circuit engine which lends ...